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fix:排除 PUBLISH.md，避免敏感信息被打包

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Roe-xin
2026-03-05 09:34:44 +08:00
parent 24b30df992
commit 63015c6bbc
2 changed files with 2 additions and 1 deletions
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1
.vscodeignore
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@ -18,6 +18,7 @@ node_modules/**
# 文档（避免中文文件名打包问题） # 文档（避免中文文件名打包问题）
docs/** docs/**
PUBLISH.md
# 只排除 waveform_trace 的 src/dist 目录 # 只排除 waveform_trace 的 src/dist 目录
tools/waveform_trace/src/dist/** tools/waveform_trace/src/dist/**

2
package.json
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@ -2,7 +2,7 @@
"name": "iccoder", "name": "iccoder",
"displayName": "IC Coder: Agentic Verilog Platform", "displayName": "IC Coder: Agentic Verilog Platform",
"description": "Agentic Verilog Coding Platform for Real-World FPGAs", "description": "Agentic Verilog Coding Platform for Real-World FPGAs",
"version": "1.0.9", "version": "1.0.10",
"publisher": "ICCoderAgenticVerilogPlatform", "publisher": "ICCoderAgenticVerilogPlatform",
"engines": { "engines": {
"vscode": "^1.80.0" "vscode": "^1.80.0"